View MAX5387NAUD_8450962.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

general description the max5387 dual, 256-tap, volatile, low-voltage linear taper digital potentiometer offers three end-to-end resis - tance values of 10k, 50k, and 100k. operating from a single +2.6v to +5.5v power supply, the device provides a low 35ppm/oc end-to-end temperature coefficient. the device features an i 2 c interface. the small package size, low supply operating voltage, low supply current, and automotive temperature range of the max5387 make the device uniquely suitable for the portable consumer market and battery-backup industrial applications. the max5387 is specified over the automotive -40oc to +125oc temperature range and is available in a 14-pin tssop package. applications low-voltage battery applications portable electronics mechanical potentiometer replacement offset and gain control adjustable voltage references/linear regulators features dual, 256-tap linear taper positions single +2.6v to +5.5v supply operation low < 1a quiescent supply current 10k, 50k, 100k end-to-end resistance values i 2 c-compatible interface power-on sets wiper to midscale -40oc to + 125oc operating temperature range 19-5140; rev 3; 9/14 note: all devices are specified over the -40oc to +125oc oper - ating temperature range. + denotes a lead(pb)-free/rohs-compliant package. part pin-package end-to-end resistance (k?) max5387laud+ 14 tssop 10 max5387maud+ 14 tssop 50 MAX5387NAUD+ 14 tssop 100 latch i 2 c gnd v dd 256 decoder 256 decoder wa ha la hbwb lb latch por scl sda a0 a1 a2 max5387 max5387 dual, 256-tap, volatile, low-voltage linear taper digital potentiometer functional diagram ordering information evaluation kit available downloaded from: http:///
v dd to gnd ............................................................-0.3v to +6v h_, w_, l_ to gnd ..................................... -0.3v to the lower of (v dd + 0.3v) and +6v all other pins to gnd..............................................-0.3v to +6v continuous current into h_, w_, and l_ max5387l ...................................................................... 5ma max5387m ..................................................................... 2ma max5387n ..................................................................... 1ma continuous power dissipation (t a = +70oc) 14-pin tssop (derate 10mw/oc above +70oc) ......796.8mw operating temperature range .......................... -40oc to +125oc junction temperature ...................................................... +150oc storage temperature range ............................. -65oc to +150oc lead temperature (soldering, 10s) ................................. +300oc soldering temperature (reflow) ....................................... +260oc (v dd = +2.6v to +5.5v, v h_ = v dd , v l_ = gnd, t a = -40oc to +125oc, unless otherwise noted. typical values are at v dd = +5v, t a = +25oc.) (note 1) parameter symbol conditions min typ max units resolution n 256 ta p dc performance (voltage-divider mode) integral nonlinearity inl (note 2) -0.5 +0.5 lsb differential nonlinearity dnl (note 2) -0.5 +0.5 lsb dual code matching register a = register b -0.5 +0.5 lsb ratiometric resistor tempco (v w / w )/t; no load +5 lsb full-scale error code = ffh max5387l -3 -2.5 lsb max5387m -1 -0.5 max5387n -0.5 -0.25 zero-scale error code = 00h max5387l +2.5 +3 lsb max5387m +0.5 +1.0 max5387n +0.25 +0.5 dc performance (variable-resistor mode) integral nonlinearity r-inl v dd > +2.6v max5387l 1.0 2.5 lsb max5387m 0.5 1.0 max5387n 0.25 0.8 v dd > +4.75v max5387l 0.4 1.5 max5387m 0.3 0.75 max5387n 0.25 0.5 differential nonlinearity r-dnl v dd > 2.6v (note 3) -0.5 +0.5 lsb dc performance (resistor characteristics) wiper resistance (note 4) r wl v dd > 2.6v 250 600 ? v dd > 4.75v 150 200 terminal capacitance c h_ , c l_ measured to gnd 10 pf wiper capacitance c w_ measured to gnd 50 pf end-to-end resistor tempco tc r no load 35 ppm/oc end-to-end resistor tolerance r hl wiper not connected -25 +25 % max5387 dual, 256-tap, volatile, low-voltage linear taper digital potentiometer www.maximintegrated.com maxim integrated 2 absolute maximum ratings stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. electrical characteristics downloaded from: http:///
(v dd = +2.6v to +5.5v, v h_ = v dd , v l_ = gnd, t a = -40oc to +125oc, unless otherwise noted. typical values are at v dd = +5v, t a = +25oc.) (note 1) note 1: all devices are 100% production tested at t a = +25oc. specifications overtemperature limits are guaranteed by design and characterization. note 2: dnl and inl are measured with the potentiometer configured as a voltage-divider (figure 1) with h_ = v dd and l_ = 0v. the wiper terminal is unloaded and measured with an ideal voltmeter. note 3: r-dnl and r-inl are measured with the potentiometer configured as a variable resistor (figure 1). d nl and inl are mea - sured with the potentiometer configured as a variable resistor. h_ is unconnected and l_ = gnd. for v dd = +5v, the wiper terminal is driven with a source current of 400a for the 10k configuration, 80a for the 50k conf iguration, and 40a for the 100k configuration. for v dd = +2.6v, the wiper terminal is driven with a source current of 200a for the 10k configu - ration, 40a for the 50k configuration, and 20a for the 100k configuration. note 4: the wiper resistance is the worst value measured by injecting the currents given in note 3 into w_ with l_ = gnd. r w = (v w - v h )/i w . parameter symbol conditions min typ max units ac performancecrosstalk (note 5) -90 db -3db bandwidth bw code = 80h,10pf load, v dd = +2.6v max5387l 600 khz max5387m 150 max5387n 75 total harmonic distortion plus noise thd+n measured at w; v h_ = 1v rms at 1khz 0.015 % wiper settling time (note 6) t s max5387l 300 ns max5387m 1000 max5387n 2000 power supplies supply-voltage range v dd 2.6 5.5 v standby current digital inputs = v dd or gnd 1 a digital inputs minimum input high voltage v ih 70 % x v dd maximum input low voltage v il 30 % x v dd input leakage current -1 +1 a input capacitance 5 pf timing characteristics (notes 7, 8) maximum scl frequency f scl 400 khz setup time for start condition t su:sta 0.6 s hold time for start condition t hd:sta 0.6 s scl high time t high 0.6 s scl low time t low 1.3 s data setup time t su:dat 100 ns data hold time t hd:dat 0 s sda, scl rise time t r 0.3 s sda, scl fall t f 0.3 s setup time for stop condition t su:sto 0.6 s bus free time between stop and start conditions t buf minimum power-up rate = 0.2v/s 1.3 s pulse-suppressed spike width t sp 50 ns capacitive load for each bus c b 400 pf max5387 dual, 256-tap, volatile, low-voltage linear taper digital potentiometer www.maximintegrated.com maxim integrated 3 electrical characteristics (continued) downloaded from: http:///
note 5: drive ha with a 1khz gnd to v dd amplitude tone. la = lb = gnd. no load. wb is at midscale with a 10pf load. measure wb. note 6: the wiper settling time is the worst-case 0 to 50% rise time, measured between tap 0 and tap 127. h _ = v dd , l_ = gnd, and the wiper terminal is loaded with 10pf capacitance to ground. note 7: digital timing is guaranteed by design and characterization, not production tested. note 8: the scl clock period includes rise and fall times (t r = t f ). all digital input signals are specified with t r = t f = 2ns and timed from a voltage level of (v il + v ih )/2. (v dd = 5v, t a = +25c, unless otherwise noted.) figure 1. voltage-divider and variable resistor configurations h l w w n.c. l digital input voltage (v) supply current (a) 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 1 10 100 1000 10,000 0.1 0 5.0 supply current vs. digital input voltage max5387 toc02 v dd = 5v v dd = 2.6v supply current vs. supply voltage max5387 toc03 v dd (v) i dd (a) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 5.1 4.6 4.1 3.6 3.1 2.6 resistance (w-to-l) vs. tap position (10k ? ) tap position w-to-l resistance (k? ) 255 204 153 51 102 3 96 11 0 4 10 72 85 1 0 max5387 toc04 resistance (w-to-l) vs. tap position (50k ? ) tap position w-to-l resistance (k? ) 255 204 153 51 102 15 4530 55 0 20 5035 10 4025 5 0 max5387 toc05 resistance (w-to-l) vs. tap position (100k ? ) max5387 toc06 tap position resistance (w-to-l) (k ? ) 204 153 102 51 10 20 30 40 50 60 70 80 90 100 110 0 0 255 supply current vs. temperature max5387 toc01 temperature (c) supply current (a) 110 95 65 80 -10 5 20 35 50 -25 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 -40 125 v dd = 5v v dd = 2.6v max5387 dual, 256-tap, volatile, low-voltage linear taper digital potentiometer www.maximintegrated.com maxim integrated 4 typical operating characteristics electrical characteristics (continued) downloaded from: http:///
(v dd = 5v, t a = +25c, unless otherwise noted.) wiper resistance vs. wiper voltage (10k ? ) wiper voltage (v) wiper resistance (? ) 0.5 3.0 5.0 4.5 4.0 1.5 2.5 2.0 1.0 3.5 110 150 90 130 190170 210 70 0 max5387 toc07 v dd = 2.6v v dd = 5v end-to-end resistance % change vs. temperature max5387 toc08 temperature (oc) end-to-end resistance % change 110 95 80 65 50 35 20 5 -10 -25 -0.4 -0.3 -0.2 -0.1 0 0.1 -0.5 -40 125 10k ? 50k ? 100k ? variable-resistor dnl vs. tap position (10k ? ) max5387 toc09 tap position dnl (lsb) 204 153 102 51 -0.08 -0.06 -0.04 -0.02 0 0.02 0.04 0.06 0.08 0.10 -0.10 0 255 i wiper = 400a variable-resistor dnl vs. tap position (50k ? ) max5387 toc10 tap position dnl (lsb) 204 153 102 51 -0.08 -0.06 -0.04 -0.02 0 0.02 0.04 0.06 0.08 0.10 -0.10 0 255 i wiper = 80a variable-resistor dnl vs. tap position (100k ? ) max5387 toc11 tap position dnl (lsb) 204 153 102 51 -0.08 -0.06 -0.04 -0.02 0 0.02 0.04 0.06 0.08 0.10 -0.10 0 255 i wiper = 400a variable-resistor inl vs. tap position (10k ? ) max5387 toc12 tap position inl (lsb) 204 153 102 51 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 -1.0 0 255 i wiper = 400a variable-resistor inl vs. tap position (50k ? ) max5387 toc13 tap position inl (lsb) 204 153 102 51 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 -0.5 0 255 i wiper = 80a variable-resistor inl vs. tap position (100k ? ) max5387 toc14 tap position inl (lsb) 204 153 102 51 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 -0.5 0 255 i wiper = 400a voltage-divider dnl vs. tap position (10k ? ) max5386 toc15 tap position dnl (lsb) 204 153 102 51 -0.08 -0.06 -0.04 -0.02 0 0.02 0.04 0.06 0.08 0.10 -0.10 0 255 max5387 dual, 256-tap, volatile, low-voltage linear taper digital potentiometer maxim integrated 5 www.maximintegrated.com typical operating characteristics (continued) downloaded from: http:///
(v dd = 5v, t a = +25c, unless otherwise noted.) voltage-divider dnl vs. tap position (50k ? ) max5387 toc16 tap position dnl (lsb) 204 153 102 51 -0.08 -0.06 -0.04 -0.02 0 0.02 0.04 0.06 0.08 0.10 -0.10 0 255 voltage-divider dnl vs. tap position (100k ? ) max5387 toc17 tap position dnl (lsb) 204 153 102 51 -0.08 -0.06 -0.04 -0.02 0 0.02 0.04 0.06 0.08 0.10 -0.10 0 255 voltage-divider inl vs. tap position (10k ? ) max5387 toc18 tap position inl (lsb) 204 153 102 51 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 -0.5 0 255 voltage-divider inl vs. tap position (50k ? ) max5386 toc19 tap position inl (lsb) 204 153 102 51 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 -0.5 0 255 voltage-divider inl vs. tap position (100k ? ) max5387 toc20 tap position inl (lsb) 204 153 102 51 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 -0.5 0 255 tap-to-tap switching transient (code 127 to 128) (10k ? ) max5387 toc21 v w-l 20mv/divscl 5v/div 400ns/div tap-to-tap switching transient (code 127 to 128) (50k ? ) max5387 toc22 v w-l 20mv/divscl 5v/div 1s/div tap-to-tap switching transient (code 127 to 128) (100k ? ) max5387 toc23 v w-l 20mv/divscl 5v/div 1 s/div max5387 dual, 256-tap, volatile, low-voltage linear taper digital potentiometer maxim integrated 6 www.maximintegrated.com typical operating characteristics (continued) downloaded from: http:///
(v dd = 5v, t a = +25c, unless otherwise noted.) max5387 power-on wiper transient (code 0 to 128) 2s/div v dd 2v/div output w2v/div max5387 toc24 midscale frequency response max5387 toc25 frequency (khz) gain (db) 1,000 100 10 1 0.1 -20 -10 0 10 -30 0.01 10,000 v in = 1v p-p c w = 10pf max5387l max5387m max5387n crosstalk vs. frequency max5387 toc26 frequency (khz) crosstalk (db) 100 10 1 0.1 -120 -100 -80 -60 -40 -20 0 -140 0.01 1000 max5387l max5387m max5387n total harmonic distortion plus noise vs. frequency max5387 toc27 frequency (khz) thd+n (%) 10 1 0.10 0.02 0.04 0.06 0.08 0.10 0.12 0.14 0 0.01 100 max5387l max5387m max5387n max5387 dual, 256-tap, volatile, low-voltage linear taper digital potentiometer maxim integrated 7 www.maximintegrated.com typical operating characteristics (continued) downloaded from: http:///
pin name function 1 ha resistor a high terminal. the voltage at ha can be higher or lower than the voltage at la. current can low into or out of ha. 2 wa resistor a wiper terminal 3 la resistor a low terminal. the voltage at la can be higher or lower than the voltage at ha. current can low into or out of la. 4 hb resistor b high terminal. the voltage at hb can be higher or lower than the voltage at lb. current can low into or out of hb. 5 wb resistor b wiper terminal 6 lb resistor b low terminal. the voltage at lb can be higher or lower than the voltage at hb. current can low into or out of lb. 7 i.c. internally connected. connect to gnd. 8 gnd ground 9 a2 address input 2. connect to v dd or gnd. 10 a1 address input 1. connect to v dd or gnd. 11 a0 address input 0. connect to v dd or gnd. 12 sda i 2 c-compatible serial-data input/output. a pullup resistor is required. 13 scl i 2 c-compatible serial-clock input. a pullup resistor is required. 14 v dd power-supply input. bypass v dd to gnd with a 0.1f capacitor close to the device. v dd sclsda hb la wa ha + a0a1 a2 i.c. lb gnd wb 1413 12 11 10 9 8 1 23 45 6 7 top view max5387 tssop max5387 dual, 256-tap, volatile, low-voltage linear taper digital potentiometer www.maximintegrated.com maxim integrated 8 pin description pin coniguration downloaded from: http:///
detailed description the max5387 dual, 256-tap, volatile, low-voltage linear taper digital potentiometer offers three end-to-end resis - tance values of 10k, 50k, and 100k. the potenti - ometer consists of 255 fixed resistors in series between terminals h_ and l_. the potentiometer wiper, w_, is programmable to access any one of the 256 tap points on the resistor string. the potentiometers are programmable independently of each other. the max5387 features an i 2 c interface. i 2 c digital interface the i 2 c interface contains a shift register that decodes the command and address bytes, routing the data to the appropriate control registers. data written to a control register immediately updates the wiper position. wipers a and b power up in midposition, d[7:0] = 80h. serial addressing the max5387 operates as a slave device that receives data through an i 2 c-/smbus?-compatible 2-wire serial interface. the interface uses a serial-data access (sda) line and a serial-clock line (scl) to achieve bidirectional communication between master(s) and slave(s). a mas - ter, typically a microcontroller, initiates all data transfers to the max5387, and generates the scl clock that syn - chronizes the data transfer (figure 2). the max5387 sda line operates as both an input and an open-drain output. the sda line requires a pullup resistor, typically 4.7k. the max5387 scl line operates only as an input. the scl line requires a pullup resistor (typically 4.7k) if there are multiple masters on the 2-wire inter - face, or if the master in a single-master system provides an open-drain scl output. each transmission consists of a start (s) condition (figure 3) sent by a master, followed by the max5387 7-bit slave address plus the nop/ w bit (figure 6), 1 command byte and 1 data byte, and finally a stop (p) condition (figure 3). start and stop conditions scl and sda remain high when the interface is inactive. a master controller signals the beginning of a transmis - sion with a start condition by transitioning sda from high to low while scl is high. the master controller issues a stop condition by transitioning the sda from low to high while scl is high, after finishing communicating with the slave. the bus is then free for another transmission. smbus is a trademark of intel corp. figure 2. i 2 c serial interface timing diagram sdascl start condition (s) t low t buf t high t hd:sta t hd:sta t su:dat t r t f t su:std repeated start condition (sr) acknowledge (a) stop condition (p) start condition (s) t hd-dat t su:dta max5387 dual, 256-tap, volatile, low-voltage linear taper digital potentiometer www.maximintegrated.com maxim integrated 9 downloaded from: http:///
bit transfer one data bit is transferred during each clock pulse. the data on the sda line must remain stable while scl is high. see figure 4. acknowledge the acknowledge bit is a clocked 9th bit that the recipi - ent uses to handshake receipt of each byte of data. see figure 5. each byte transferred requires a total of nine bits. the master controller generates the 9th clock pulse, and the recipient pulls down sda during the acknowledge clock pulse, so the sda line remains stable low during the high period of the clock pulse. slave address the max5387 includes a 7-bit slave address (figure 6). the 8th bit following the 7th bit of the slave address is the nop/ w bit. set the nop/ w bit low for a write command and high for a no-operation command. the device does not support readback. the device provides three address inputs (a0, a1, and a2), allowing up to eight devices to share a common bus (table 1). the first 4 bits (msbs) of the factory-set slave addresses are always 0101. a2, a1, and a0 set the next 3 bits of the slave address. connect each address input to v dd or gnd. each device must have a unique address to share a common bus. figure 3. start and stop conditions figure 4. bit transfer figure 5. acknowledge p stop condition s start condition sda scl sdascl data stable, data valid change of data allowed 9 8 2 1 start condition sclsda clock pulse for acknowledgment not acknowledge acknowledge max5387 dual, 256-tap, volatile, low-voltage linear taper digital potentiometer www.maximintegrated.com maxim integrated 10 downloaded from: http:///
message format for writing write to the devices by transmitting the devices slave address with nop/ w (eighth bit) set to zero, followed by at least 2 bytes of information. the first byte of information is the command byte. the second byte is the data byte. the data byte goes into the internal register of the device as selected by the command byte (figure 7 and table 2). command byte use the command byte to select the destination of the wiper data. see table 2. command descriptions reg a: the data byte writes to register a and the wiper of potentiometer a moves to the appropriate position. d[7:0] indicates the position of the wiper. d[7:0] = 00h moves the wiper to the position closest to la. d[7:0] = ffh moves the wiper to the position closest to ha. d[7:0] is 80h fol - lowing power-on. table 1. slave addresses figure 6. slave address figure 7. command and single data byte received address inputs slave address a2 a1 a0 gnd gnd gnd 0101000 gnd gnd v dd 0101001 gnd v dd gnd 0101010 gnd v dd v dd 0101011 v dd gnd gnd 0101100 v dd gnd v dd 0101101 v dd v dd gnd 0101110 v dd v dd v dd 0101111 lsb msb start sda scl 0 1 0 1 a2 a1 a0 ack nop/ w s 0 a a a p acknowledge nop/ w how control byte and data byte map into device registers acknowledge r7 r6 r5 r4 r3 r2 r1 r0 d7 d6 d5 d4 d3 d2 d1 d0 slave address command byte 1 data byte max5387 dual, 256-tap, volatile, low-voltage linear taper digital potentiometer www.maximintegrated.com maxim integrated 11 downloaded from: http:///
reg b: the data byte writes to register b and the wiper of potentiometer b moves to the appropriate position. d[7:0] indicates the position of the wiper. d[7:0] = 00h moves the wiper to the position closest to lb. d[7:0] = ffh moves the wiper to the position closest to hb. d[7:0] is 80h fol - lowing power-on. regs a and b: the data byte writes to registers a and b and the wipers of potentiometers a and b move to the appropriate position. d[7:0] indicates the position of the wiper. d[7:0] = 00h moves the wipers to the position clos - est to l_. d[7:0] = ffh moves the wipers to the position closest to h_. d[7:0] is 80h following power-on. applications information variable gain ampliier figure 8 shows a potentiometer adjusting the gain of a noninverting amplifier. figure 9 shows a potentiometer adjusting the gain of an inverting amplifier. adjustable dual regulator figure 10 shows an adjustable dual linear regulator using a dual potentiometer as two variable resistors. adjustable voltage reference figure 11 shows an adjustable voltage reference circuit using a potentiometer as a voltage-divider. table 2. i 2 c command byte summary figure 8. variable gain noninverting amplifier figure 9. variable gain inverting amplifier figure 10. adjustable dual linear regulator address byte command byte data byte scl cycle no. start (s) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 stop (p) a6 a5 a4 a3 a2 a1 a0 w ack (a) r7 r6 r5 r4 r3 r2 r1 r0 ack (a) d7 d6 d5 d4 d3 d2 d1 d0 ack (a) reg a 0 1 0 1 a2 a1 a0 0 0 0 0 1 0 0 0 1 d7 d6 d5 d4 d3 d2 d1 d0 reg b 0 1 0 1 a2 a1 a0 0 0 0 0 1 0 0 1 0 d7 d6 d5 d4 d3 d2 d1 d0 regs a and b 0 1 0 1 a2 a1 a0 0 0 0 0 1 0 0 1 1 d7 d6 d5 d4 d3 d2 d1 d0 v in v out h l w v in v out h l w v out1 v out2 out1out2 set1set2 in v+ l l h h w w max8866 max5387 dual, 256-tap, volatile, low-voltage linear taper digital potentiometer www.maximintegrated.com maxim integrated 12 downloaded from: http:///
variable gain current to voltage converter figure 12 shows a variable gain current to voltage con - verter using a potentiometer as a variable resistor. lcd bias control figure 13 shows a positive lcd bias control circuit using a potentiometer as a voltage-divider. figure 14 shows a positive lcd bias control circuit usinga potentiometer as a variable resistor. programmable filter figure 15 shows a programmable filter using a dual potentiometer. offset-voltage adjustment circuit figure 16 shows an offset-voltage adjustment circuit using a dual potentiometer. figure 11. adjustable voltage reference figure 13. positive lcd bias control using a voltage-divider figure 12. variable gain i-to-v converter figure 14. positive lcd bias control using a variable resistor out in 3.0v v ref gnd l h w max6037 l v out h w +5v l r1 r2 r3 v out i s h w v out = -i s x ((r3 x (1 + r2/r1)) + r2) l v out h w +5v max5387 dual, 256-tap, volatile, low-voltage linear taper digital potentiometer www.maximintegrated.com maxim integrated 13 downloaded from: http:///
figure 15. programmable filter figure 16. offset-voltage adjustment circuit package type package code outline no. land pattern no. 14 tssop u14+1 21-0066 90-0113 v out v in la ha wb lb hb r2 r1 r3 wa v out lb hb wb wa la ha +5v max5387 dual, 256-tap, volatile, low-voltage linear taper digital potentiometer www.maximintegrated.com maxim integrated 14 package information for the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. chip information process: bicmos downloaded from: http:///
revision number revision date description pages changed 0 1/10 initial release 1 4/10 added soldering temperature in absolute maximum ratings ; corrected code in conditions of -3db bandwidth speciication in electrical characteristics 2 2 11/10 updated igures for optimal circuit operation 12, 13, 14 3 9/14 removed automotive references from data sheet 1 maxim integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim integrated product. no circuit patent licenses are implied. maxim integrated reserves the right to change the circuitry and speciications without n otice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated and the maxim integrated logo are trademarks of maxim integrated products, inc. max5387 dual, 256-tap, volatile, low-voltage linear taper digital potentiometer ? 2014 maxim integrated products, inc. 15 revision history for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim integrateds website at www.maximintegrated.com. downloaded from: http:///

▲Up To Search▲

Price & Availability of MAX5387NAUD

	To Download MAX5387NAUD Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .